Design and test of capacitive detection system for wheat seeding quantity

Abstract: At present, the methods of seeding detection are photoelectric-based method, image-based method and capacitance-based method. For the photoelectric-based method, the detection accuracy of photoelectric sensor is affected by the vibration, light, temperature and other factors on the farmland. When multiple seeds fall simultaneously, the refraction phenomenon of photoelectric sensor also affects the accurate detection. For the image-based method, its high precision detection provides a new way to improve the performance of wheat-planter seeding. However, image processing technology requires special equipment with high cost, and cameras are easy to be interfered by external light. Consequently, it is difficult to be widely applied in the complex environment on the farmland. Compared with photoelectric-based and image-based methods, the capacitance-based method is less affected by light and dust and thus has a strong environmental adaptability. However, when multiple seeds fall simultaneously, the detection accuracy of the capacitance-based method still needs to be improved. In this paper, a precise detection system for wheat-planter seeding quantity was designed using the capacitance-based method. The detection resolution and the constraint relation between the seeding speed and the sampling frequency determine the structure size of the capacitance sensor. To guarantee the detection accuracy, every seed should be detected only once as far as possible when it passes through the parallel plate of capacitance sensor. Then the initial sampling period can be determined according to the above sampling method. Meanwhile, high detection accuracy is difficult to be achieved due to the small capacitance change in detection system and the influence of parasitic capacitance and environment in conditioning circuit. Therefore, the capacitance analog-to-digital conversion chip of AD7746 is utilized to effectively reduce the error caused by the above factors. The signal acquisition and processing circuit for precise detection of wheat-planter was designed based on the AD7746 and the single chip microprocessor of STM8. Ideally, the seed passing through the capacitor plate will be sampled only once by the capacitive sensor. However, the times of the seed passing through the parallel plate will be changed with different wheat-planter seeding speeds, which will affect the distribution of sampling times when the seed passes through the capacitor plate. The least squares regression model of the real-time wheat-planter seeding quantity detection was built under the condition with the sampling period of 15 ms and the wheat-planter speed of 20 r/min. The results showed that when the sampling period is 15 ms, the relative error between the number of seeds calculated by the least squares regression model and the actual number of seeds increases with the speed of the wheat planter. Consequently, to make the detection system suitable for the different seeding speeds, a detecting method was proposed by changing the sampling period, in which the sampling period was reduced by 0.4 ms when the wheat-planter speed was increased by 5 r/min. The least square regression model established above is still applicable for this case. The results showed that high detection accuracy can be obtained for different seeding speeds, and the relative error was between -2.26%－2.17%.